mirror of https://github.com/Nonannet/pelfy.git
commit
4330c4015a
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@ -1,6 +1,6 @@
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[project]
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name = "pelfy"
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version = "1.0.6"
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version = "1.0.7"
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authors = [
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{ name="Nicolas Kruse", email="nicolas.kruse@nonan.net" },
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]
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@ -406,6 +406,8 @@ relocation_table_types = {
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14: ("R_ARM_THM_SWI8", 8, "S + A"),
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15: ("R_ARM_XPC25", 25, ""),
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16: ("R_ARM_THM_XPC22", 22, ""),
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28: ("R_ARM_CALL", 24, "((S + A) - P) >> 2"),
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29: ("R_ARM_JUMP24", 24, "((S + A) - P) >> 2"),
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30: ("R_ARM_TLS_DESC", 0, ""),
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32: ("R_ARM_ALU_PCREL_7_0", 7, "(S - P + A) & 0x000000FF"),
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33: ("R_ARM_ALU_PCREL_15_8", 15, "(S - P + A) & 0x0000FF00"),
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@ -501,14 +501,14 @@ class elf_file:
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symbol_index = r_info >> 8
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relocation_type = r_info & 0xFF
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ret['r_addend'] = self.read_int(el_off + 8, 4, True) \
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if sh.type == 'SHT_RELA' else self._get_rel_32bit_addend(r_offset, sh)
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if sh.type == 'SHT_RELA' else self._get_rel_addend(relocation_type, r_offset, sh)
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elif self.bit_width == 64:
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r_offset = self.read_int(el_off, 8)
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r_info = self.read_int(el_off + 8, 8)
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symbol_index = r_info >> 32
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relocation_type = r_info & 0xFFFFFFFF
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ret['r_addend'] = self.read_int(el_off + 16, 8, True) \
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if sh.type == 'SHT_RELA' else self._get_rel_32bit_addend(r_offset, sh)
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if sh.type == 'SHT_RELA' else self._get_rel_addend(relocation_type, r_offset, sh)
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else:
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raise NotImplementedError(f"{self.bit_width} bit is not supported")
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@ -516,9 +516,36 @@ class elf_file:
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ret['r_info'] = r_info
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yield elf_relocation(self, ret, symbol_index, relocation_type, sh['sh_info'], i)
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def _get_rel_32bit_addend(self, r_offset: int, reloc_section: elf_section) -> int:
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def _get_rel_addend(self, relocation_type: int, r_offset: int, reloc_section: elf_section) -> int:
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reloc_types = fdat.relocation_table_types.get(self.architecture)
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if reloc_types and 'A' in reloc_types[relocation_type][2]:
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name = reloc_types[relocation_type][0]
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sh = self.sections[reloc_section['sh_info']]
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return self.read_int(r_offset + sh['sh_offset'], 4, True)
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field = self.read_int(r_offset + sh['sh_offset'], 4, True)
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if name in ('R_386_PC32', 'R_386_32', 'R_X86_64_PC32', 'R_X86_64_PLT32', 'R_ARM_REL32', 'R_ARM_ABS32'):
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return field
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if name == 'R_ARM_MOVW_ABS_NC':
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imm4 = (field >> 16) & 0xF
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imm12 = field & 0xFFF
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return imm12 | (imm4 << 12)
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if name == 'R_ARM_MOVT_ABS':
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imm4 = (field >> 16) & 0xF
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imm12 = field & 0xFFF
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return (imm12 << 16) | (imm4 << 28) # Upper 16 bit
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if name in ('R_ARM_JUMP24', 'R_ARM_CALL'):
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imm24 = field & 0xFFFFFF
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if imm24 & 0x800000:
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imm24 |= ~0xFFFFFF
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return imm24 << 2
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if '_THM_' in name:
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print('Warning: Thumb relocation addend extraction is not implemented')
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return 0
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if '_MIPS_' in name:
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print('Warning: MIPS relocations addend extraction is not implemented')
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return 0
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raise NotImplementedError(f"Relocation addend extraction for {name} is not implemented")
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return 0
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def read_bytes(self, offset: int, num_bytes: int) -> bytes:
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"""Read bytes from ELF file.
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