mirror of https://github.com/Nonannet/pyladoc.git
44 lines
1.7 KiB
HTML
44 lines
1.7 KiB
HTML
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<p>Below is an in-depth explanation of the AArch64 (ARM64)
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unconditional branch instruction—often simply called the
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“B” instruction—and how its 26‐bit immediate field (imm26)
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is laid out and later relocated during linking.</p>
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<hr>
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<h2>Instruction Layout</h2>
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<p>The unconditional branch in AArch64 is encoded in a 32‑bit
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instruction. Its layout is as follows:</p>
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<pre><code>Bits: 31 26 25 0
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+-------------+------------------------------+
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| Opcode | imm26 |
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+-------------+------------------------------+
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</code></pre>
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<ul>
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<li><strong>Opcode (bits 31:26):</strong></li>
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<li>For a plain branch (<code>B</code>), the opcode is <code>000101</code>.</li>
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<li>
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<p>For a branch with link (<code>BL</code>), which saves the return
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address (i.e., a call), the opcode is <code>100101</code>.
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These 6 bits determine the instruction type.</p>
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</li>
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<li>
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<p><strong>Immediate Field (imm26, bits 25:0):</strong></p>
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</li>
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<li>This 26‑bit field holds a signed immediate value.</li>
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<li>
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<p><strong>Offset Calculation:</strong> At runtime, the processor:</p>
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<ol>
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<li><strong>Shifts</strong> the 26‑bit immediate left by 2 bits.
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(Because instructions are 4-byte aligned,
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the two least-significant bits are always zero.)</li>
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<li><strong>Sign-extends</strong> the resulting 28‑bit value to
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the full register width (typically 64 bits).</li>
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<li><strong>Adds</strong> this value to the program counter
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(PC) to obtain the branch target.</li>
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</ol>
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</li>
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<li>
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<p><strong>Reach:</strong></p>
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</li>
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<li>With a 26‑bit signed field that’s effectively 28 bits
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after the shift, the branch can cover a range
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of approximately ±128 MB from the current instruction.</li>
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</ul>
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