From 5ee63efeb7fa0dfa213f7bcd6ccf2cdb37bb918a Mon Sep 17 00:00:00 2001 From: Nicolas Date: Thu, 30 Oct 2025 16:08:38 +0100 Subject: [PATCH] Bit size for R_AARCH64_*_ABS_LO12_NC relocations fixed --- src/pelfy/_fields_data.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/pelfy/_fields_data.py b/src/pelfy/_fields_data.py index 3a9d360..6321e42 100644 --- a/src/pelfy/_fields_data.py +++ b/src/pelfy/_fields_data.py @@ -447,9 +447,9 @@ relocation_table_types = { 280: ("R_AARCH64_CONDBR19", 19, "S + A - P"), 282: ("R_AARCH64_JUMP26", 26, "S + A - P"), 283: ("R_AARCH64_CALL26", 26, "S + A - P"), - 284: ("R_AARCH64_LDST16_ABS_LO12_NC", 16, "S + A"), - 285: ("R_AARCH64_LDST32_ABS_LO12_NC", 32, "S + A"), - 286: ("R_AARCH64_LDST64_ABS_LO12_NC", 64, "S + A"), + 284: ("R_AARCH64_LDST16_ABS_LO12_NC", 12, "S + A"), + 285: ("R_AARCH64_LDST32_ABS_LO12_NC", 12, "S + A"), + 286: ("R_AARCH64_LDST64_ABS_LO12_NC", 12, "S + A"), 287: ("R_AARCH64_MOVW_PREL_G0", 16, "S + A - P"), 288: ("R_AARCH64_MOVW_PREL_G0_NC", 16, "S + A - P"), 289: ("R_AARCH64_MOVW_PREL_G1", 32, "S + A - P"),