code style fixed

This commit is contained in:
Nicolas Kruse 2026-03-29 14:56:05 +02:00 committed by Nicolas Kruse
parent 0fd292ecfa
commit f63e09fb99
10 changed files with 19 additions and 21 deletions

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@ -79,7 +79,7 @@ def get_all_dag_edges_between(roots: Iterable[Node], leaves: Iterable[Node]) ->
# Walk the DAG in reverse direction starting from given leaves to given roots # Walk the DAG in reverse direction starting from given leaves to given roots
emitted_edges: set[tuple[Node, Node]] = set() emitted_edges: set[tuple[Node, Node]] = set()
node_list = [n for n in leaves] node_list = list(leaves)
while(node_list): while(node_list):
child_node = node_list.pop() child_node = node_list.pop()
if child_node in parent_lookup: if child_node in parent_lookup:
@ -104,7 +104,7 @@ def get_all_dag_edges(nodes: Iterable[Node]) -> Generator[tuple[Node, Node], Non
""" """
emitted_edges: set[tuple[Node, Node]] = set() emitted_edges: set[tuple[Node, Node]] = set()
used_nets: dict[Net, Net] = {} used_nets: dict[Net, Net] = {}
node_list: list[Node] = [n for n in nodes] node_list: list[Node] = list(nodes)
while(node_list): while(node_list):
node = node_list.pop() node = node_list.pop()

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@ -303,7 +303,7 @@ if __name__ == "__main__":
code += get_custom_stencil('abs_int(int arg1)', 'result_int(__builtin_abs(arg1));') code += get_custom_stencil('abs_int(int arg1)', 'result_int(__builtin_abs(arg1));')
for t in types: for t in types:
code += get_custom_stencil(f"sign_{t}({t} arg1)", f"result_int((arg1 > 0) - (arg1 < 0));") code += get_custom_stencil(f"sign_{t}({t} arg1)", "result_int((arg1 > 0) - (arg1 < 0));")
fnames = ['atan2', 'pow'] fnames = ['atan2', 'pow']
for fn, t1, t2 in permutate(fnames, types, types): for fn, t1, t2 in permutate(fnames, types, types):

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@ -7,8 +7,6 @@ import sys
import numpy as np import numpy as np
from numpy.core._multiarray_umath import __cpu_features__ from numpy.core._multiarray_umath import __cpu_features__
from copapy._matrices import diagonal
CPU_SIMD_FEATURES = "SSE SSE2 SSE3 SSSE3 SSE41 SSE42 AVX AVX2 AVX512F FMA3" CPU_SIMD_FEATURES = "SSE SSE2 SSE3 SSSE3 SSE41 SSE42 AVX AVX2 AVX512F FMA3"